Opis
Modern Computer Architecture and Organization – Second Edition (E-book)
Are you a software developer, systems designer, or computer architecture student looking for a methodical introduction to digital device architectures, but are overwhelmed by the complexity of modern systems? This step-by-step guide will teach you how modern computer systems work with the help of practical examples and exercises. Youll gain insights into the internal behavior of processors down to the circuit level and will understand how the hardware executes code developed in high-level languages.This book will teach you the fundamentals of computer systems including transistors, logic gates, sequential logic, and instruction pipelines. You will learn details of modern processor architectures and instruction sets including x86, x64, ARM, and RISC-V. You will see how to implement a RISC-V processor in a low-cost FPGA board and write a quantum computing program and run it on an actual quantum computer.This edition has been updated to cover the architecture and design principles underlying the important domains of cybersecurity, blockchain and bitcoin mining, and self-driving vehicles.By the end of this book, you will have a thorough understanding of modern processors and computer architecture and the future directions these technologies are likely to take. Spis treści:PrefaceWho this book is forWhat this book coversTo get the most out of this bookGet in touchIntroducing Computer ArchitectureTechnical requirementsThe evolution of automated computing devicesCharles Babbages Analytical EngineENIACIBM PCThe Intel 8088 microprocessorThe Intel 80286 and 80386 microprocessorsThe iPhoneMoores lawComputer architectureRepresenting numbers with voltage levelsBinary and hexadecimal numbersThe 6502 microprocessorThe 6502 instruction setSummaryExercisesDigital LogicTechnical requirementsElectrical circuitsThe transistorLogic gatesLatchesFlip-flopsRegistersAddersPropagation delayClockingSequential logicHardware description languagesVHDLSummaryExercisesProcessor ElementsTechnical requirementsA simple processorControl unitExecuting an instruction a simple exampleArithmetic logic unitRegistersThe instruction setAddressing modesImmediate addressing modeAbsolute addressing modeAbsolute indexed addressing modeIndirect indexed addressing modeInstruction categoriesMemory load and store instructionsRegister-to-register data transfer instructionsStack instructionsArithmetic instructionsLogical instructionsBranching instructionsSubroutine call and return instructionsProcessor flag instructionsInterrupt-related instructionsNo operation instructionInterrupt processingprocessingprocessingBRK instruction processingInput/output operationsProgrammed I/OInterrupt-driven I/ODirect memory accessSummaryExercisesComputer System ComponentsTechnical requirementsMemory subsystemIntroducing the MOSFETConstructing DRAM circuits with MOSFETsThe capacitorThe DRAM bit cellDDR5 SDRAMGraphics DDRPrefetchingI/O subsystemParallel and serial data busesPCI ExpressSATAM.2USBThunderboltGraphics displaysVGADVIHDMIDisplayPortNetwork interfaceEthernetWi-FiKeyboard and mouseKeyboardMouseModern computer system specificationsSummaryExercisesHardware-Software InterfaceTechnical requirementsDevice driversThe parallel portPCIe device driversDevice driver structureBIOSUEFIThe boot processBIOS bootUEFI bootTrusted bootEmbedded devicesOperating systemsProcesses and threadsScheduling algorithms and process priorityMultiprocessingSummaryExercisesSpecialized Computing DomainsTechnical requirementsReal-time computingReal-time operating systemsDigital signal processingADCs and DACsDSP hardware featuresSignal processing algorithmsConvolutionDigital filteringFast Fourier transform (FFT)GPU processingGPUs as data processorsBig dataDeep learningExamples of specialized architecturesSummaryExercisesProcessor and Memory ArchitecturesTechnical requirementsThe von Neumann, Harvard, and modified Harvard architecturesThe von Neumann architectureThe Harvard architectureThe modified Harvard architecturePhysical and virtual memoryPaged virtual memoryPage status bitsMemory poolsMemory management unitSummaryExercisesPerformance-Enhancing TechniquesTechnical requirementsCache memoryMultilevel processor cachesStatic RAMLevel 1 cacheDirect-mapped cacheSet associative cacheProcessor cache write policiesLevel 2 and level 3 processor cachesInstruction pipeliningSuperpipeliningPipeline hazardsMicro-operations and register renamingConditional branchesSimultaneous multithreadingSIMD processingSummaryExercisesSpecialized Processor ExtensionsTechnical requirementsPrivileged processor modesHandling interrupts and exceptionsProtection ringsSupervisor mode and user modeSystem callsFloating-point arithmeticThe 8087 floating-point coprocessorThe IEEE 754 floating-point standardPower managementDynamic voltage frequency scalingSystem security managementTrusted Platform ModuleThwarting cyberattackersSummaryExercisesModern Processor Architectures and Instruction SetsTechnical requirementsx86 architecture and instruction setThe x86 register setx86 addressing modesImplied addressingRegister addressingImmediate addressingDirect memory addressingRegister indirect addressingIndexed addressingBased indexed addressingBased indexed addressing with scalingx86 instruction categoriesData movementStack manipulationArithmetic and logicConversionsControl flowString manipulationFlag manipulationInput/outputProtected modeMiscellaneous instructionsOther instruction categoriesCommon instruction patternsx86 instruction formatsx86 assembly languagex64 architecture and instruction setThe x64 register setx64 instruction categories and formatsx64 assembly language32-bit ARM architecture and instruction setThe ARM register setARM addressing modesImmediateRegister directRegister indirectRegister indirect with offsetRegister indirect with offset, pre-incrementedRegister indirect with offset, post-incrementedDouble register indirectDouble register indirect with scalingARM instruction categoriesLoad/storeStack manipulationRegister movementArithmetic and logicComparisonsControl flowSupervisor modeBreakpointConditional executionOther instruction categories32-bit ARM assembly language64-bit ARM architecture and instruction set64-bit ARM assembly languageSummaryExercisesThe RISC-V Architecture and Instruction SetTechnical requirementsThe RISC-V architecture and applicationsThe RISC-V base instruction setComputational instructionsControl flow instructionsMemory access instructionsSystem instructionsPseudo-instructionsPrivilege levelsRISC-V extensionsThe M extensionThe A extensionThe C extensionThe F and D extensionsOther extensionsRISC-V variants64-bit RISC-VStandard RISC-V configurationsRISC-V assembly languageImplementing RISC-V in an FPGASummaryExercisesProcessor VirtualizationTechnical requirementsIntroducing virtualizationTypes of virtualizationOperating system virtualizationApplication virtualizationNetwork virtualizationStorage virtualizationCategories of processor virtualizationTrap-and-emulate virtualizationParavirtualizationBinary translationHardware emulationVirtualization challengesUnsafe instructionsShadow page tablesSecurityVirtualizing modern processorsx86 processor virtualizationx86 hardware virtualizationARM processor virtualizationRISC-V processor virtualizationVirtualization toolsVirtualBoxVMware WorkstationVMware ESXiKVMXenQEMUVirtualization and cloud computingElectrical power consumptionSummaryExercisesDomain-Specific Computer ArchitecturesTechnical requirementsArchitecting computer systems to meet unique requirementsSmartphone architectureiPhone 13 Pro MaxPersonal computer architectureAlienware Aurora Ryzen Edition R10 gaming desktopRyzen 9 5950X branch predictionNvidia GeForce RTX 3090 GPUAurora subsystemsWarehouse-scale computing architectureWSC hardwareRack-based serversHardware fault managementElectrical power consumptionThe WSC as a multilevel information cacheDeploying a cloud applicationNeural networks and machine learning architecturesIntel Nervana neural network processorSummaryExercisesCybersecurity and Confidential Computing ArchitecturesTechnical requirementsCybersecurity threatsCybersecurity threat categoriesCyberattack techniquesTypes of malwarePost-exploitation actionsFeatures of secure hardwareIdentify what needs to be protectedAnticipate all types of attacksFeatures of secure system designSecure key storageEncryption of data at restEncryption of data in transitCryptographically secure key generationSecure boot procedureTamper-resistant hardware designConfidential computingDesigning for security at the architectural levelAvoid security through obscurityComprehensive secure designThe principle of least privilegeZero trust architectureEnsuring security in system and application softwareCommon software weaknessesBuffer overflowCross-site scriptingSQL injectionPath traversalSource code security scansSummaryExercisesBlockchain and Bitcoin Mining ArchitecturesTechnical requirementsIntroduction to blockchain and bitcoinThe SHA-256 hash algorithmComputing SHA-256Bitcoin core softwareThe bitcoin mining processBitcoin mining poolsMining with a CPUMining with a GPUBitcoin mining computer architecturesMining with FPGAsMining with ASICsBitcoin mining economicsAlternative types of cryptocurrencySummaryExercisesSelf-Driving Vehicle ArchitecturesTechnical requirementsOverview of self-driving vehiclesDriving autonomy levelsSafety concerns of self-driving vehiclesHardware and software requirements for self-driving vehiclesSensing vehicle state and the surroundingsGPS, speedometer, and inertial sensorsVideo camerasRadarLidarSonarPerceiving the environmentConvolutional neural networksExample CNN implementationCNNs in autonomous driving applicationsLidar localizationObject trackingDecision processingLane keepingComplying with the rules of the roadAvoiding objectsPlanning the vehicle pathAutonomous vehicle computing architectureTesla HW3 AutopilotSummaryExercisesQuantum Computing and Other Future Directions in Computer ArchitecturesTechnical requirementsThe ongoing evolution of computer architecturesExtrapolating from current trendsMoores law revisitedThe third dimensionIncreased device specializationPotentially disruptive technologiesQuantum physicsSpintronicsQuantum computingQuantum code-breakingAdiabatic quantum computationThe future of quantum computingCarbon nanotubesBuilding a future-tolerant skill setContinuous learningCollege educationConferences and literatureSummaryExercisesAppendixAnswers to ExercisesChapter 1: Introducing Computer ArchitectureExercise 1AnswerExercise 2AnswerExercise 3AnswerExercise 4AnswerExercise 5AnswerExercise 6AnswerChapter 2: Digital LogicExercise 1AnswerExercise 2AnswerExercise 3AnswerExercise 4AnswerExercise 5AnswerExercise 6AnswerChapter 3: Processor ElementsExercise 1AnswerExercise 2AnswerExercise 3AnswerExercise 4AnswerExercise 5AnswerExercise 6AnswerChapter 4: Computer System ComponentsExercise 1AnswerExercise 2AnswerChapter 5: Hardware-Software InterfaceExercise 1AnswerExercise 2AnswerChapter 6: Specialized Computing DomainsExercise 1AnswerExercise 2AnswerExercise 3AnswerChapter 7: Processor and Memory ArchitecturesExercise 1AnswerExercise 2AnswerExercise 3AnswerChapter 8: Performance-Enhancing TechniquesExercise 1AnswerExercise 2AnswerExercise 3AnswerChapter 9: Specialized Processor ExtensionsExercise 1AnswerExercise 2AnswerExercise 3AnswerExercise 4AnswerExercise 5AnswerExercise 6AnswerExercise 7AnswerExercise 8AnswerChapter 10: Modern Processor Architectures and Instruction SetsExercise 1AnswerExercise 2AnswerExercise 3AnswerExercise 4AnswerExercise 5AnswerExercise 6AnswerExercise 7AnswerExercise 8AnswerChapter 11: The RISC-V Architecture and Instruction SetExercise 1AnswerExercise 2AnswerExercise 3AnswerChapter 12: Processor VirtualizationExercise 1AnswerExercise 2AnswerExercise 3AnswerChapter 13: Domain-Specific Computer ArchitecturesExercise 1AnswerExercise 2AnswerChapter 14: Cybersecurity and Confidential Computing ArchitecturesExercise 1AnswerExercise 2AnswerExercise 3AnswerChapter 15: Blockchain and Bitcoin Mining ArchitecturesExercise 1AnswerExercise 2AnswerChapter 16: Self-Driving Vehicle ArchitecturesExercise 1AnswerExercise 2AnswerExercise 3AnswerExercise 4AnswerChapter 17: Future Directions in Computer ArchitecturesExercise 1AnswerExercise 2AnswerExercise 3AnswerExercise 4AnswerOther Books You May EnjoyIndex
Pozostałe E-booki
soplica orzech laskowy kcal, veroni energy, centrum testów, książka o sporcie, www ale pitny pl, kółko do pływania dla dorosłych, sejf kasetka na pieniądze, zamek elsy, baton proteinowy go on, przyprawy w słoiczkach kamis, toaleta damska oznaczenia, lego friends dla dziewczynek, polaroid now wkłady, lody carte d or smaki, mielona kawa, puder dla niemowlat, boss the scent
yyyyy
